| | Advance Program [Sun] [Mon] [Tue] [Wed]
Venue (unless otherwise mentioned): - Davis Auditorium, Schapiro Building (CEPSR), Columbia University
Sunday, March 13, 2005
| 6:00pm-8:00pm | Reception and Registration |
| | Venue: Columbia University Faculty House (appetizers and dinner)
| Monday, March 14, 2005
| 8:00 | Breakfast |
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| 9-9:15 | | Welcome | Chair: Steve Nowick |
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| 9:15-10:15 | | Invited Talk 1 | Chair: Steve Nowick |
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| | Deep Pipelines vs. Risk and Power Walls
Bob Colwell, R.E. Colwell and Assoc., Inc (formerly at Intel) | | |
| 10:15-10:30 | Break |
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| 10:30-12:00 | | Session 1: Circuit Techniques. | Chair: Marc Renaudin |
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| | Energy Efficient Surfing
Suwen Yang, Brian Winters, Mark Greenstreet | | | GasP Control for Domino Circuits
Jo Ebergen, Jonathan Gainsley, Jon Lexau, Ivan Sutherland | | | Design of Multi-GHz Power Aware Asynchronous Pipelined Circuits in MOS Current Mode Logic
Tin Wai Kwan, Maitham Shams | | |
| 12:00-1:30 | Lunch. Venue: Carleton Lounge, Mudd Engineering Building |
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| 1:30-3:00 | | Session 2: On-Chip Networks. | Chair: Peter Beerel |
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| | A Scheduling Discipline for Latency and Bandwidth Guarantees in
Asynchronous Network-on-chip
Tobias Bjerregaard, Jens Sparso | | | An Asynchronous Router for Multiple Service Levels Network on Chip
Dobkin Rostislav, Victoria Vishnyakov, Eyal Friedman, Ran Ginosar | | | An Asynchronous NOC Architecture Providing Low Latency Service and its Multi-Level Design Framework
Edith Beigne, Fabien Clermidy, Pascal Vivet, Alain Clouard, Marc Renaudin | | |
| 3:00-3:30 | Break |
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| 3:30-4:15 | | Industrial Snapshots and Open Discussion | Chair: Ken Stevens |
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| 4:15-4:30 | Break |
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| 4:30-6:00 | | Session 3: Clocking and Synchronization. | Chair: Charles Dike |
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| | Register Communication Between two Mutually Asynchronous Domains
Joep Kessels | | | Request Driven GALS Technique for Wireless Communication System
Milos Krstic, Eckhard Grass, Christian Stahl | | | Self-timed Circuitry for Global Clocking
Scott Fairbanks, Simon Moore | | |
| On your own for the evening |
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Tuesday, March 15, 2005
| 8:00 | Breakfast |
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| 9:00-10:00 | | Invited Talk 2 | Chair: Rajit Manohar |
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| | Proximity Communication and Time
Robert Drost and Ivan Sutherland, Sun Microsystems Laboratories | | |
| 10:00-10:30 | Break |
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| 10:30-12:00 | | Session 4: Design Analysis. | Chair: Alex Kondratyev |
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| | Modeling and Verifying Circuits Using Generalized Relative Timing
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Stevens | | | Controlling Event Spacing in Self-Timed Rings
V. Zebilis, C.P. Sotiriou | | | Delay Insensitive Coding and Power Analysis: A Balancing Act
Konrad J. Kulikowski, Ming Su, Alexander Taubin, Mark G. Karpovsky | | |
| 12:00-1:30 | Lunch. Venue: Carleton Lounge, Mudd Engineering Building |
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| 1:30-2:00 | | Tribute to Victor Varshavsky | Chair: Alex Kondratyev |
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| | Speakers: Leonid Rozenblyum and Alex Kondratyev
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| 2:00-3:30 | | Session 5: Design Implementations. | Chair: Hans Jacobson |
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| | A Scalable Counterflow-Pipelined Asynchronous Radix-Four Booth Multiplier
Justin Hensley, Anselmo Lastra, Montek Singh | | | Continuous Time Digital Signal Processor
Yee William Li, Kenneth L. Shepard, Yannis Tsividis | | | BitSNAP: Dynamic Significance Compression for a Low-Energy Sensor Network Asynchronous Processor
Virantha Ekanayake, Clinton Kelly IV, Rajit Manohar | | |
| Break, followed by excursion/banquet |
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| 6:00 | Excursion: arrive at Chelsea Piers, Pier 61, West 23rd Street (at Hudson River) |
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| 7:00-10:00 | Dinner banquet/cruise in New York Harbor (Bateaux New York) |
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Wednesday, March 16, 2005
| 8:00 | Breakfast |
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| 8:45-9:45 | | Session 6: Test and Reliability. | Chair: Marly Roncken |
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| | SEU Tolerant QDI Circuits
Wonjin Jang, Alain J. Martin | | | A Multiplexor Based Test Method for Self-Timed Circuits
Frank te Beest, Ad Peeters | | |
| 9:45-10:00 | Break |
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| 10:00-12:30 | | Tutorial | Chair: Prabhakar Kudva |
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| | New Prospects for Clocking Synchronous and Quasi-Asynchronous Systems
Phillip Restle, IBM T.J. Watson, and Ken Shepard, Columbia University | | |
| 12:30-1:30 | Lunch. Venue: Carleton Lounge, Mudd Engineering Building |
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| 1:30-3:00 | | Session 7: Encoding and Synthesis. | Chair: David Kinniment |
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| | High Level Synthesis of Timed Asynchronous Circuits
Tomohiro Yoneda, Atsushi Matsumoto, Manabu Kato, Chris Myers | | | Behavior and Synthesis of Two-Input Gate Asynchronous Circuits
Nikolai Starodoubtsev, Sergei Bystrov | | | A Unified Coding for Delay-Insensitivity
Fredric Worm, Paolo Ienne, Patrick Thiran | | |
| 3:00-3:30 | | Closing and Awards | Chair: Peter Hofstee and Jose Tierno |
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| Evening | Post Symposium Activities to be posted shortly Wednesday evening and through Thursday daytime and evening |
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