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Description.
Top-down approach to asynchronous design and the relation between
computer architecture and VLSI design. For the asynchronous design
component: high-level synthesis, design by program transformations,
and correctness by construction. Topics include delay-insensitive
design techniques, description of circuits as concurrent programs,
circuit compilation, and correct design decomposition. Students will
complete a group design project.
Prerequisites. ECE 314 and ECE 474.
Credits. 4 credits
Lectures. MW 10:10-11:25am, 213 PH
MW 9:55-11:10am, 314 HO
Office hours: M 2:30-4pm
Filipp Akopyan will have extra office hours: R 2pm-4pm, Upson 358
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