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Description.
Top-down approach to asynchronous design and the relation between
computer architecture and VLSI design. For the asynchronous design
component: high-level synthesis, design by program transformations,
and correctness by construction. Topics include delay-insensitive
design techniques, description of circuits as concurrent programs,
circuit compilation, and correct design decomposition. Students will
complete a group design project.
Prerequisites. ECE 3140 and ECE 4740.
Credits. 4 credits
Lectures. MW 1:25-2:40pm, 216 Olin
Office hours: MW 2:45-4pm, 330 Rhodes
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