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EE 571: Asynchronous VLSI Design |
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Instructor: Rajit ManoharAn important scientific innovation rarely makes its way by gradually winning over and converting its opponents: it rarely happens that Saul becomes Paul. What does happen is that its opponents gradually die out and that the growing generation is familiarized with the idea from the beginning. Max PlankDescription. An introductory course in asynchronous design. The course is targeted at the graduate and advanced undergraduate level. The course is about the design of clockless digital circuits whose correct operation is relatively independent of delays in wires and gates. Emphasis will be placed on the synthesis of circuits by program transformations. Topics include: circuits as concurrent programs, delay-insensitive design techniques, synthesis of circuits from programs, timing analysis and performance optimization, pipelining, and case studies of complex asynchronous designs. Prerequisites. EE 231/2; EE/CS 314. Textbook. none. Time/place. Tuesday/Thursday 10:10-11:25, 219 Phillips. Office hours. Tuesday 2-4pm, 330 Rhodes. The CSL teaching lab has a help page that describes how to access the CSL machines remotely, and has some general information about the teaching lab environment. |
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