[Magic-dev] creation of extra nodes in .ext files?

Piyush Sood faithnomore182 at gmail.com
Fri Apr 15 00:45:39 EDT 2005


Hi all,

I'm working on Magic 7.2 on Sun Solaris. Can anyone possibly shed some
light on why the following happens?

When I draw a simple layout like this:

------------------------------------------------------------------------------------------------------------
magic
tech scmos
timestamp 1113543856
<< nwell >>
rect -45 10 -20 20
rect -11 10 7 20
<< polysilicon >>
rect -38 15 -36 17
rect -29 15 -27 17
rect -4 15 -1 17
rect -38 -6 -36 12
rect -29 -6 -27 12
rect -4 0 -1 12
rect -4 -5 -1 -3
rect -38 -11 -36 -9
rect -29 -11 -27 -9
<< ndiffusion >>
rect -5 -3 -4 0
rect -1 -3 0 0
rect -39 -9 -38 -6
rect -36 -9 -29 -6
rect -27 -9 -26 -6
<< pdiffusion >>
rect -39 12 -38 15
rect -36 12 -35 15
rect -31 12 -29 15
rect -27 12 -26 15
rect -5 12 -4 15
rect -1 12 0 15
<< metal1 >>
rect -43 20 15 23
rect -43 16 -40 20
rect -26 16 -23 20
rect -9 16 -6 20
rect -34 7 -31 12
rect -49 3 -42 6
rect -34 4 -8 7
rect -1 4 23 7
rect -49 -12 -46 3
rect -34 0 -31 4
rect -42 -3 -31 0
rect -42 -5 -39 -3
rect -9 -6 -6 -3
rect -22 -9 -6 -6
rect 6 -9 15 -6
rect 20 -12 23 4
rect -49 -15 23 -12
<< ntransistor >>
rect -4 -3 -1 0
rect -38 -9 -36 -6
rect -29 -9 -27 -6
<< ptransistor >>
rect -38 12 -36 15
rect -29 12 -27 15
rect -4 12 -1 15
<< polycontact >>
rect -42 3 -38 7
rect -8 4 -4 8
<< ndcontact >>
rect -43 -9 -39 -5
rect -9 -3 -5 1
rect 0 -3 4 1
rect -26 -9 -22 -5
<< pdcontact >>
rect -43 12 -39 16
rect -35 12 -31 16
rect -26 12 -22 16
rect -9 12 -5 16
rect 0 12 4 16
<< labels >>
rlabel polysilicon -28 1 -28 1 1 enable
rlabel metal1 -20 -8 -20 -8 1 gnd
rlabel metal1 -23 4 -23 4 1 nandout
rlabel metal1 -42 22 -42 22 5 vdd
rlabel polycontact -41 4 -41 4 1 en2
rlabel metal1 7 6 7 6 1 test
<< end >>
------------------------------------------------------------------------------------------------------------


When I extract it using "extract", I get the following .ext file:
------------------------------------------------------------------------------------------------------------
timestamp 1113543856
version 7.2
tech scmos
style lambda=1.0(scna20_orb)
scale 1000 1 100
resistclasses 26670 59550 23860 19690 27260 2000000 49 26 2505830
node "m1_6_n9#" 0 1269 6 -9 m1 0 0 0 0 0 0 0 0 0 0 0 0 27 24 0 0 0 0
node "a_n36_n9#" 62 0 -36 -9 ndiff 21 20 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "a_n1_n3#" 44 752 -1 -3 ndiff 19 18 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "gnd" 170 4183 -27 -9 ndiff 38 36 0 0 0 0 0 0 0 0 0 0 57 44 0 0 0 0
node "a_n1_12#" 99 752 -1 12 pdiff 0 0 19 18 0 0 0 0 0 0 0 0 0 0 0 0 0 0
node "enable" 334 4764 -29 -11 p 0 0 0 0 56 60 0 0 0 0 0 0 0 0 0 0 0 0
node "nandout" 384 13486 -43 -9 ndc 19 18 25 22 82 58 0 0 0 0 0 0 144
102 0 0 0 0
node "test" 336 25674 -42 3 pc 0 0 0 0 72 68 0 0 0 0 0 0 402 274 0 0 0 0
equiv "test" "en2"
node "vdd" 638 10434 -43 12 pdc 0 0 57 54 0 0 0 0 0 0 0 0 210 146 0 0 0 0
node "w_n11_10#" 4510 0 -11 10 nw 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 180 56
node "w_n45_10#" 6265 0 -45 10 nw 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 250 70
cap "nandout" "enable" 180
cap "vdd" "w_n11_10#" 564
cap "w_n45_10#" "vdd" 1128
cap "w_n45_10#" "enable" 1432
cap "nandout" "w_n11_10#" 1828
cap "w_n45_10#" "nandout" 282
cap "test" "nandout" 180
cap "w_n45_10#" "test" 1432
device mosfet nfet -29 -9 -28 -8 2 3 "Gnd!" "enable" 4 0 "a_n36_n9#" 3
0 "gnd" 3 0
device mosfet nfet -38 -9 -37 -8 2 3 "Gnd!" "test" 4 0 "nandout" 3 0
"a_n36_n9#" 3 0
device mosfet nfet -4 -3 -3 -2 3 3 "Gnd!" "nandout" 6 0 "gnd" 3 0 "a_n1_n3#" 3 0
device mosfet pfet -4 12 -3 13 3 3 "w_n11_10#" "nandout" 6 0 "vdd" 3 0
"a_n1_12#" 3 0
device mosfet pfet -29 12 -28 13 2 3 "w_n45_10#" "enable" 4 0
"nandout" 3 0 "vdd" 3 0
device mosfet pfet -38 12 -37 13 2 3 "w_n45_10#" "test" 4 0 "vdd" 3 0
"nandout" 3 0
------------------------------------------------------------------------------------------------------------

So my question is that where do these nodes "a_n36_n9#" and "a_n1_n3#"
etc come from?

When I do a exttosim on this file and then run irsim, it shows all
these extra nodes that i never put in there. where are they coming
from?

I have redrawn this layout in 4 separate files but eventually, some
random nodes start to show up. I have been troubleshooting this
extensively (deleting selected portions of the layout and then
re-extracting, deleting selected lines from the .ext  and .sim files
etc). That seems to help temprorarily, until i put certain sections
like ndiff back, in which case the nodes come back or worse, there are
now even more random nodeswhen i re-extract

Does anyone have any ideas on what the problem might be?

Thanks in advance.
-Piyush Sood.



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