[Magic-dev] Magic Query

[R. Timothy Edwards]

Dear Ganesh,

 > 1) To what technology features of transistors does the MAGIC layout
 >    support.

    Magic-7.2 and magic-7.3 (and I think the feature was added to 7.1)
support feature sizes down to 1 nanometer.  Standard (scmos) technology
files are available for processes down to 0.18um.  Proprietary technology
files can (sometimes, with NDAs, lawyers' agreement, etc.) be obtained
for 90nm and 65nm processes.

 > 2) How do I get to know more about the pre-layout(Design) phase compatible
 >    with the MAGIC software

    Depends on what you want to do.  People have used all sorts of schematic
and simulation tools with magic.  Please be more specific.

 > 3) Why is metal1 drawn with 4lambda size while the actual textual size
 >    is 3lambda.

"textual size"?  Requirements for feature sizes depend on the process,
design rules, and choices made by whoever designs the technology files.
Vendor design rules rarely ever fall neatly on lambda boundaries (except
for poly gate width), so the technology file usually rounds the design
rules up (conservatively) to the nearest lambda boundary.  Typically for
metal1 this is 3 lambda, but some process design rules require metal1
width to be slightly larger than 3 lambda, in which case the technology
file may round up to 4 lambda.

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| Dr. R. Timothy Edwards (Tim)   | email: tim.edwards at multigig.com     |
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