[Magic-dev] Using magic with STM 90nm process???

[R. Timothy Edwards]

Dear Clint,

> I am going to use magic to produce a chip with the 90nm process from 
> STMicroelectronics.

> - Does anybody have a magic tech file for this process?
> - Has anybody used magic to make a chip with this process?

I have some experience with the TSMC 90nm process, and I can tell
you that magic is not well-suited to the increasingly bizarre
design rules at 130nm and below.  You should not attempt to do any
layout in 90nm on magic without some way to run DRC through, say,
Calibre.  At some point, I'm going to attempt to capture some of
the more common contact-surround rules in magic's design rule checker.
Other aspects of 90nm rules, like five or six "wide metal spacing"
rules per metal layer, can now be captured with magic's DRC, but
will slow the DRC down to a crawl.

I have done some standard-cell layout for 90nm, but nothing has
been fabricated from it yet.

In short, designing for 90nm is NOT like designing for 0.5um, and
should be done with a great deal of care and caution.

					Regards,
					Tim

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