[Magic-dev] Free ATPG Simulation Tool

[Dean Lewis]

Thank you for the response. However, I think I have not made my needs
clear. I can test my circuits for correct operation well enough with spice
simulations. I'm looking for a fault simulator and test pattern generator.
Such a program would give me an estimate of the cost vs coverage trade-off
were I to actually manufacture my circuit and subsequently test it for
manufacturing errors.
--
Dean Lewis
PhD Student, Computer Engineering
Georgia Institute of Technology

> Dear Dean,
>
>  > This is a follow-up to my previous email (thanks for all the
> responses).
>  > Can anyone recommend a good tool for test simulation (i.e. generating
> the
>  > test patterns and calculating test time and coverage)?
>
> For *digital* simulation, or rather circuits that are primarily digital,
> IRSIM is an excellent tool for simulation.  It is a digital simulator
> in the sense that it expects all signals to resolve to GND or VDD, but
> takes a transistor-level netlist and models transistors as resistive
> switches.  IRSIM version 9.7 is based on Tcl/Tk, and I have found it
> very easy to write test patterns in Tcl scripts.  As far as methodical
> ways to ensure 100% coverage, though, it doesn't do that.  For a way
> to quickly write massively complicated test benches for digital circuits,
> I know of no better tool.  I use it to verify all the digital standard
> cell blocks I design for MultiGiG.
>
> 						---Tim
>
> +--------------------------------+-------------------------------------+
> | Dr. R. Timothy Edwards (Tim)   | email: tim.edwards at multigig.com     |
> | MultiGiG, Inc.                 | web:   http://www.multigig.com      |
> | 100 Enterprise Way, Suite A-3  | phone: (831) 621-3283               |
> | Scotts Valley, CA 95066        | cell:  (240) 401-0616               |
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>