[Magic-dev] Dumb Newbie question (a.k.a. digital design flows)

Svenn Are Bjerkem svenn.bjerkem at googlemail.com
Thu Oct 11 22:54:14 EDT 2007


On 10/11/07, Leandro Marsó <leandro.listas at gmail.com> wrote:
> > I assume that since digital flows are used to build microprocessors,
> > the software tools to manage the flows are highly valued, very lucrative,
> > and therefore are rarely to be found in the public domain.
> And what is your opinion about describing circuits using functional
> languages like Haskell?
> I'm starting to study it, so I can't tell you much now, but there is a
> interesting site that addresses the subject:
> http://www.funhdl.org (Functional HDL)

AI have done digital design in semi-full custom with schematic capture
of gates and a cell-based placement/routing of macros and verilog RTL
design and full-custom high-speed digital as well as analog design.
Since I have worked for a Japanese company, I took some lessons in
Japanese and I have somehow experienced that the human pattern
recognition is under-utilized if you do your design in text only. It
doesn't matter what language it is, sooner or later you lose "the
feeling" for the application.

When we did schematic capture of digital logic, there was a convention
how to draw the schematics. This lead to a huge "reuse" of functional
blocks as the brain was able to categorize parts of the schematics
into their functionality. This is of course sub-optimal design when
speed or die utilization, but understanding and reuse across a team
was larger.

With textual capture of the design, the immediate structure is lost
unless you have an editor with object parsing capabilities. (Which
most HDL editors do have nowadays)

> they are developing atom, a Hardware Description Language embeded in haskell.
> There is also a similar system called Lava where you could describe
> your circuit and then get a verilog output for xilinx fpga or
> "generic" verilog.

Verilog is now degraded to be a "file format" for the haskell
front-end. It is in my opinion just a way to make it easier for people
with haskell experience to do verilog. I have no experience with this
flow so I should really not judge but my gut feeling is that a textual
view of a textual view is just helping you implementing an algorithm
in hardware (Which _is_ the main business of semiconductors), but
unless you understand the language _and_ the algorithm, you don't have
the posibility to trace signal paths to gain experience with a
circuit. Whoever has tried to understand verilog by looking at a
synthesis from Synopsys know that only a human can draw in a way that
another human can understand the functionality from the gate structure
of a netlist. (Or at least most humans....)
-- 
Svenn



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