[Magic-dev] Dumb Newbie question (a.k.a. digital design flows)

[Simon HARPHAM]

Hi Tim et al,

... perhaps I missed the point of this conversation, but personally I 
have found that once spice variants gave us heirarchy and the expression 
controlled source, almost all behavioural descriptions became possible 
including "digital" blocks.  To be able to partition a design into 
smaller blocks then to be able to write progressively higher level 
descriptions and compare them to "equivalent" spice netlists extracted 
directly from a layout is extremely powerful and does not involve the 
use of any other language.  The only two drawbacks I know of is the 
ability of many spice variants to converge large MOS netlist with 
"totem-pole" structures and the availability of a compact register 
(flip-flop) or state-engine description, something the "behavioural" 
equation overcomes in part if you know how to write it.

Personally, as a circuit design and layout oriented person, I do not see 
the need for Verilog or VHDL other than being able to "interface" with 
the (digital) system designers and to convert their efforts in something 
physical.

Why add another language when we already have a perfectly good one? (spice)

- is not the issue one of improving the ability of the underlying 
algorithms in the existing tools to converger larger circuits in a more 
effecient way, rather than trying to create new tools?

As a few of the PC based spice variants are written in C or C++, I would 
have thought that it was not that difficult to be able to bring the 
softies on board as well - it just seems to me that we (as an industry) 
should be going from C (or C++) directly to SPICE.

Cheers,
             SimonH.

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