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Sensor Networks / Ultra Low Power Systems
Understanding the behavior of network infrastructure is of critical
importance in an information-centric world. The conventional approach
to this problem is to build a software-based simulator that models the
network, and use it to determine how the network behaves under
different circumstances. However, the software-based approach is very
slow, and simulations that model a few minutes of network activity
might take many hours to complete. This precludes the design of a
network where the simulator feedback can be used to dynamically adapt
the network to address performance bottlenecks or even
denial-of-service attacks. This is especially important in ad hoc
wireless networks where key network properties such as connectivity
and channel characteristics vary frequently. Our group is designing an
asynchronous VLSI simulator architecture (a ``network on a chip'') that overcomes these limitations.
The processor designed as part of this simulator architecture is also
energy-efficient, and suitable for use in a large scale sensor
network. My group has designed a version of the core processor that
has the same instruction set, but which can be connected to an actual
RF data link so that we can implement an efficient sensor node. The
net result is a highly efficient microprocessor optimized for sensor
network applications.
This is the first published design of a microprocessor optimized for
sensor networks.
We co-organized a workshop on
sensors and sensor networks at Cornell (June 2003).
- Collaborators
- Prof. Amit Lal
- Prof. Gun Sirer
- Prof. Lang Tong
- Students
- Virantha Ekanayake
- Clinton Kelly, IV
- Publications
- Virantha Ekanayake, Clinton Kelly IV, and Rajit Manohar.
An Ultra-low-power Processor for Sensor Networks.
Proceedings of the 11th International Conference on Architectural Support for Programming Languages and Operating Systems, October 2004.
(abstract, pdf, ps)
- Clinton Kelly IV and Rajit Manohar.
An Event-Synchronization Protocol for Parallel Simulation of Large-Scale Wireless Networks.
Seventh IEEE International Symposium on Distributed Simulation and Real Time Applications, October 2003.
(abstract, pdf, ps)
- Clinton Kelly IV, Virantha Ekanayake, and Rajit Manohar.
SNAP: A Sensor Network Asynchronous Processor.
Proceedings of the Ninth International Symposium on Asynchronous Circuits and Systems, pp. 24--33, Vancouver, BC, May 2003.
(abstract, pdf, ps)
- Rajit Manohar and Anna Scaglione.
Power Optimal Routing in Wireless Networks.
IEEE International Conference on Communications, pp. 2979--2984, Anchorage, AK, May 2003.
(abstract, pdf)
- Rajit Manohar and Clinton Kelly IV.
Network on a Chip: Modeling Wireless Networks with Asynchronous VLSI.
IEEE Communications Magazine, pp. 149--155, November 2001.
(abstract, pdf, ps)
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