David Fang
a plain-text resume, best viewed 80-column
file:	http://www.csl.cornell.edu/~fang/fang_resume.txt
[last updated: 2008-07-12]

email:	fang CAT csl DECIMAL cornell PUNKT education
URL:	http://www.csl.cornell.edu/~fang
home:	408-207-5858
office:	408-889-4169
address:
	1550 Technology Dr.
	Suite 3118
	San Jose, CA 95110


OBJECTIVE:
* to boldly go where no asynchronous circuits have gone before
* solving problems that need to be solved


EDUCATION:

* PhD in Electrical and Computer Engineering at Cornell University    [2008-Aug]
  + dissertation: "Profiling Infrastructure for the Performance Evaluation
      of Asynchronous Systems"
  + advisor: Prof. Rajit Manohar
  + minor in Computer Science

* MS in ECE, Cornell University                                       [2004-Jan]
  + Thesis: "Non-Uniform Access Asynchronous Register Files"

* BS in Electrical Engineering at California Institute of Technology  [2001-Jun]
  + GPA: 3.75 (Honors)


PUBLICATIONS: (links available at ${HOMEPAGE}/research.html)

* A Three-Tier Asynchronous FPGA (invited paper)                      [2006-Sep]
  + David Fang, Chris LaFrieda, Song Peng, and Rajit Manohar 
  + 23rd VLSI/ULSI Multilevel Interconnection Conference (2006 VMIC) 

* Self-Timed Thermally Aware Circuits                                 [2006-Mar]
  + David Fang, Filipp Akopyan, and Rajit Manohar 
  + ISVLSI '06: Proc. of the Symp. on Emerging VLSI Tech. and Arch.

* A High-Performance Asynchronous FPGA: Test Results                  [2005-Apr]
  + David Fang, John Teifel, and Rajit Manohar
  + 2005 IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM '05) 

* Automated Synthesis for Asynchronous FPGAs                          [2005-Feb]
  + Song Peng, David Fang, John Teifel and Rajit Manohar
  + Proc. of Int'l Symp. on Field Programmable Gate Arrays (FPGA), 2005

* Non-Uniform Access Asynchronous Register Files                      [2004-Apr]
  + David Fang and Rajit Manohar
  + Proc. of 10th Int'l Symposium on Asynchronous Circuits and Systems

* Energy-Efficient Pipelines                                          [2002-Apr]
  + J. Teifel, D. Fang, D. Biermann, C. Kelly, R. Manohar
  + Proc. of 8th Int'l Symposium on Asynchronous Circuits and Systems


EMPLOYMENT:

* Achronix Semiconductor Corp.                                    [2007-Dec:---]
  + Senior Hardware Engineer (manager: Clint Kelly)
  + Designing and verifying asynchronous FPGA circuits
  + Developing CAD tools for asynchronous circuits

* Caltech Biophysics Lab (Prof. Stephen Quake)
  + Undergrad Research Assistant                                  [2001-Jan:May]
  + DSP programmer for atomic-precision laser tracker

* Integrated Device Technologies (IDT), Santa Clara, CA
  + Device-test Automation Engineer (mentor: Dr. Long-ching Wang) [2000-Jun:Sep]
  + Developed s/w interface for configuring wafer test bench operation
  + Coded numerical routines for empirically extracting device parameters

* Astroterra Corp., San Diego, CA (acquired by MRV Communications Inc.)
  + Undergrad Research Intern (mentor: Isaac Kim)                 [1999-Jun:Sep]
  + Field-tested and collected data for infrared laser ethernet links
  + Developed bit-error-rate analysis programs to assess signal power budgets

* Caltech Summer Undergraduate Research Fellowship (SURF)         [1998-Jun:Sep]
  + project: "Effect of Atmospheric Contamination on Growth and Morphology
	of Snow Crystals"
  + mentor: Prof. Kenneth Libbrecht


SKILLS: <proficiency: 1 (n00b) to 10 (Jedi Master)>
* Asynchronous circuit design <8>, primarily quasi delay-insensitive
  + circuit layout <8> (prefer: MAGIC editor)
* C++ <8> (armed with STL, RAII, TMP, SFINAE and not afraid to use them)
* UNIX environment (vi/sh/sed/awk/lex/yacc/make/cvs) <7>
  + GNU autotools development (automake, autoconf, libtool) <6>
* Scheme <4> (recently-learned-and-applying)
* Assembly (x86, Alpha, MIPS, some powerpc) <4> (haven't used in years)
* \LaTeX <6>, Texinfo <5>


INTERESTS:
* Asynchronous circuit design
  + energy efficient design at circuit- and system-level
* Electronic design automation (EDA) and computer-aided design (CAD)
  + synthesis, simulation, optimization, analysis
* Compilers and optimizations
* Numerical analysis
* Open-source software for scientific and engineering applications


AWARDS:
* National Defense Science and Engineering Graduate Fellowship       [2001-2004]


MEMBERSHIPS:
* IEEE Student Member [since 2001]
* Tau Beta Pi (CA B chapter) [since 2001]


DISTRACTIONS: (artistic and recreational)
* music: violin
* dance: ballroom, swing, latin
* cycling, volleyball, hiking
* programming, for fun!?