David Fang a plain-text resume, suitable for 80-column viewing file: http://www.csl.cornell.edu/~fang/fang_resume.txt [last updated: 2016-09-30] email: fang CAT csl DOG cornell DOG edu fangism CAT users DOG sourceforge DOG net fangism CAT gee-mail DOG com URL: http://www.csl.cornell.edu/~fang/ home: 408-207-fifty-eight-fifty-eight address: San Jose, CA OBJECTIVE: * make hardware design productive * solving problems that need to be solved EDUCATION: * PhD in Electrical and Computer Engineering at Cornell University [2008-Aug] + dissertation: "Profiling Infrastructure for the Performance Evaluation of Asynchronous Systems" + advisor: Prof. Rajit Manohar + minor in Computer Science (algorithms, compilers) * MS in ECE, Cornell University [2004-Jan] + Thesis: "Non-Uniform Access Asynchronous Register Files" * BS in Electrical Engineering at California Institute of Technology [2001-Jun] + GPA: 3.75 (Honors) PUBLICATIONS: (links available at ${HOMEPAGE}/research.html) * Variability in 3-D Integrated Circuits [2008-Sep] + Filipp Akopyan, Carlos Tadeo Ortega Otero, David Fang, Sandra Jackson, and Rajit Manohar + Proc. of the IEEE Custom Integrated Circuits Conference * A Three-Tier Asynchronous FPGA (invited paper) [2006-Sep] + David Fang, Chris LaFrieda, Song Peng, and Rajit Manohar + 23rd VLSI/ULSI Multilevel Interconnection Conference (2006 VMIC) * Self-Timed Thermally Aware Circuits [2006-Mar] + David Fang, Filipp Akopyan, and Rajit Manohar + ISVLSI '06: Proc. of the Symp. on Emerging VLSI Tech. and Arch. * A High-Performance Asynchronous FPGA: Test Results [2005-Apr] + David Fang, John Teifel, and Rajit Manohar + 2005 IEEE Symp. on Field-Programmable Custom Computing Machines (FCCM '05) * Automated Synthesis for Asynchronous FPGAs [2005-Feb] + Song Peng, David Fang, John Teifel and Rajit Manohar + Proc. of Int'l Symp. on Field Programmable Gate Arrays (FPGA), 2005 * Non-Uniform Access Asynchronous Register Files [2004-Apr] + David Fang and Rajit Manohar + Proc. of 10th Int'l Symposium on Asynchronous Circuits and Systems * Energy-Efficient Pipelines [2002-Apr] + J. Teifel, D. Fang, D. Biermann, C. Kelly, R. Manohar + Proc. of 8th Int'l Symposium on Asynchronous Circuits and Systems EMPLOYMENT: * Google [2015-Jan:now] + Senior Software Engineer in Platforms * Achronix Semiconductor Corp. [2007-Dec:2015-Jan] + Principal Engineer (manager: Clint Kelly) + Designing and verifying asynchronous FPGA circuits - PLI cosimulation of mixed synchronous+asynchronous circuits + Developing CAD tools for asynchronous and synchronous circuits * Caltech Biophysics Lab (Prof. Stephen Quake) + Undergrad Research Assistant [2001-Jan:May] + DSP programmer for atomic-precision laser tracker * Integrated Device Technologies (IDT), Santa Clara, CA + Device-test Automation Engineer (mentor: Dr. Long-ching Wang) [2000-Jun:Sep] + Developed s/w interface for configuring wafer test bench operation + Coded numerical routines for empirically extracting device parameters * Astroterra Corp., San Diego, CA (acquired by MRV Communications Inc.) + Undergrad Research Intern (mentor: Isaac Kim) [1999-Jun:Sep] + Field-tested and collected data for infrared laser ethernet links + Developed bit-error-rate analysis programs to assess signal power budgets * Caltech Summer Undergraduate Research Fellowship (SURF) [1998-Jun:Sep] + project: "Effect of Atmospheric Contamination on Growth and Morphology of Snow Crystals" + mentor: Prof. Kenneth Libbrecht SKILLS: * Asynchronous circuit design <8>, primarily quasi delay-insensitive + circuit layout <8> (choice weapon: MAGIC editor) * C++ <8> (ISO standard, some C++11) * Python(2) <5> * UNIX environment (vi/sh/sed/awk/lex/yacc/make) <7> + GNU developer tools (automake, autoconf, libtool) <6> * revision control systems: git <6>, cvs <4>, p4 <4> * bug/feature tracking: Bugzilla <4> * Scheme <5> (and using GNU guile) * R (statistics) <3> * Assembly (x86, Alpha, MIPS, some powerpc) <3> (haven't used in years) * \LaTeX <6>, Texinfo <5>, GNU Lilypond <4> INTERESTS / PASSIONS: * Asynchronous circuit design + energy efficient design at circuit- and system-level * Electronic design automation (EDA) and computer-aided design (CAD) + synthesis, simulation, optimization, analysis * Open-source software for scientific and engineering applications * Compilers and optimizations * Numerical analysis OPEN-SOURCE PROJECTS: (search for 'fangism') * Hierarchical Asynchronous Circuit Kompiler Toolkit "HACKT" (GPL) [2004:now] + Design tools for sync/asynchronous circuits: compiler, simulators, netlister + Sole author, developer, maintainer + URL: http://www.csl.cornell.edu/~fang/hackt/ + source: http://github.com/fangism/hackt * Fink (package/port manager for Mac OS X): http://finkproject.org/ + Maintainer (non-core) of a several packages + Unofficial maintainer and backporter for 10.4-EOL tree packages * LLVM/clang/libc++ powerpc-darwin8 port maintainer, patch contributor + URL: http://www.csl.cornell.edu/~fang/sw/llvm/ + source: http://www.github.com/fangism/llvm/tree/powerpc-darwin8 + source: http://www.github.com/fangism/clang/tree/powerpc-darwin8 + source: http://www.github.com/fangism/libcxx/tree/powerpc-darwin8 ADDITIONAL CLASSES: * Data Analysis (Jeff Leek, Johns Hopkins Univ.) [2013-Mar] + Used R as primary analysis tool AWARDS: * National Defense Science and Engineering Graduate Fellowship [2001:2004] MEMBERSHIPS: * ACM Member [2012+] * IEEE Student Member [2001] * Tau Beta Pi (CA B chapter) [2001+] DISTRACTIONS: (artistic and recreational) * music: violin * dance: swing (WCS), tango, ballroom * cycling, volleyball, hiking * programming challenges, for fun!? ART PORTFOLIO: |\__/| =-, / o o \,---------. } ==> * <== \ \ \ \ \\ / \ 6 / ) ) ) ) )v---' (((n (((n-------(((o [use your imagination]