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Carlos Tadeo Ortega Otero, Jonathan Tse, and Rajit Manohar
Wireless Sensor Networks (WSNs) present a challenging design space for
encryption algorithms. We evaluate hardware, software, and hybrid
implementations, including one of our own design, of Advanced Encryption
Standard (AES) encryption engines in the context of WSN microcontrollers.
We examine the tradeoffs between energy, throughput, memory footprint,
and sensor network node lifetime. Our measured results and models show
that our fully Quasi Delay-Insensitive, asynchronous AES design, combined
with a low-power microcontroller, offers a 60x increase in throughput at
90x less energy per bit over the commercially available TI MSP430 AES WSN
hardware. Our hardware AES offers a 30x throughput improvement over its
software counterpart, albeit with reduced lifetime. By incorporating
power gating and providing dedicated memory resources to the AES engine,
hybrid implementations can provide a 6x better throughput and increase the
lifetime by 10% over software.
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