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Rajit Manohar, Mika Nyström, and Alain J. Martin
The presence of precise exceptions in a processor leads to
complications in its design. Some recent processor architectures have
sacrificed this requirement for performance reasons at the cost of
software complexity. We present an implementation strategy for
precise exceptions in asynchronous processors that does not block the
instruction fetch when exceptions do not occur; the cost of the
exception handling mechanism is only encountered when an exception
occurs during execution---an infrequent event.
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