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Rajit Manohar and Clinton Kelly, IV
We introduce the notion of a network-on-a-chip: a programmable,
asynchronous VLSI architecture for fast and efficient simulation of
wireless networks. The approach is inspired by the remarkable
similarity between networks and asynchronous VLSI. Our approach
results in simulators that can evaluate network scenarios much faster
than real-time, enabling a new class of network protocols that can
dynamically change their behavior based on feedback from in-situ
simulation. We describe our simulation architecture, and present
results that validate our approach.
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