An Asymmetric Dual-Processor Architecture for Low Power Information Appliances

François Guimbretière, Shenwei Liu, Han Wang, Rajit Manohar

As users become increasingly conscious of their energy footprint---either to improve battery life or to respect the environment---improved energy efficiency of systems has gained in importance. This is especially important in the context of information appliances such as Ebook readers that are meant to replace books, since their energy efficiency impacts how long the appliance can be used on a single charge of the battery.

In this paper, we present a new software and hardware architecture for information appliances that provides significant advantages in terms of device lifetime. The architecture combines a low power microcontroller with a high-performance application processor, where the low power micro-controller is used to handle simple user interactions (e.g., turning pages, inking, entering text) without waking up the main application processor. We demonstrate how this architecture is easily adapted to the traditional way of building user interfaces using a user interface markup language. We report on our initial measurements using an E-ink-based prototype. When comparing our hybrid architecture to a simpler solution (based on aggressive power management), we found that we can increase the battery life by a factor of 1.72 for a reading task, and by a factor of 3.23 for a writing task. We conclude by presenting design guidelines aimed at optimizing the overall energy signature of information appliances.

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