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From: Jeff W. Sondeen (sondeen AT rcf-fs DOT usc.edu)
Date: Thu Sep 27 2001 - 22:13:33 EDT

  • Next message: erik peterson: "Re: "must-overlap" proposal" 

    Richard Lethin writes:
 > "R. Timothy Edwards" wrote:
 > > it's really not proper to assume that everybody "knows" that you
 > > have to write CIF, read it back in verbatim, and check for these kind
 > > of violations.
 > 
 > I guess you need to check somehow for connectivity violations
 > (resimulating or extracted
 > netlist comparison) and new DRC errors.  More broadly, are there any
 > pointers to documentation on foolproof MAGIC tapeout procedures online? 
 > I've been putting one together but it's all hard-learned errors.  It
 > would be nice to fortify it with someone else's checklist.
 > 

i have some approaches scattered in 
 ftp://ftp.isi.edu/pub/sondeen/magic/new/README
and
 ftp://ftp.isi.edu/pub/sondeen/magic/new/CHANGELOG

eg:
                 also, you must do this minimal verification
  before submitting your chip (as discussed in the README):

 put pin labels on top layer metal on top of the pads
 cif out              <<< using one of the 'c' output styles
 cif in               <<< using one of the 'c' input styles
 extract
 simulate, with respect to those labels

i heard that there's a substrate/well checking script somewhere, too.
/jeff

 > Thanks,
 > 
 > RIch

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