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Magic Mailing List |
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From: R. Timothy Edwards (tim AT stravinsky DOT jhuapl.edu) Date: Wed Oct 24 2001 - 14:00:55 EDT
Dear John,
This may be an end-run around your problem, but this is how I have
dealt with resistor extraction in the recent past (also for a DAC
circuit). For this application, I first tried looking at extres, but
as I had similar problems getting it to do what I wanted, I took the
approach outlined here (to any magic-dev people listening in to this
discussion: Is extres broken, and if so, what can we do about it?
If extres is not broken, or else once we fix it to our satisfaction,
is there any reason for it to be separate from the regular "extract"?).
1) Use the appropriate tech file. I was using the AMI tech file
SCN3ME_SUBM.30.tech27 from Jeff Sondeen's "2000 beta" set. Most
if not all of these *.tech27 files contain a layer type "rpoly" which
represents nothing more than "poly" used as a resistor (sort of like
using a "resistor ID box" in other layout editors). "rpoly" requires
another layer called "pseudo_rpoly", which looks sort of like a well
or implant, to overlap the "rpoly" layer by at least one unit on all
sides ("rpoly" acts like "poly" + "pseudo_rpoly").
2) Draw "pseudo_rpoly" on top of poly wherever you want to define a
resistor. A typical resistor looks like:
ppp
ppp
rRRRr p = polysilicon
rRRRr r = pseudo_rpoly
rRRRr R = rpoly (poly + pseudo_rpoly)
rRRRr
rRRRr
ppp
ppp
3) Extract. The "extract" section of the 2000b tech files contains the
line:
fet rpoly poly,pc 2 polyResistor Gnd! nwell,pwell 0 0
which after ext2spice gives you something like this:
m1005 rtap a_536_60 rout Gnd zpolyResistor w=21 l=20
+ ad=0 pd=0 as=0 ps=0
This means that resistors get extracted as FETS. However, it is not
too much trouble to look for the lines in the resulting SPICE netlist
containing the model name "polyResistor" and run a "sed" script or
somesuch to replace the transistor with a resistor. Here is where
the use of "pseudo_rpoly" comes into effect: Due to the overlap,
the "pseudo_rpoly" acts like a transistor gate for the purposes of
transistor extraction. Therefore, the gate node in the SPICE deck
can be ignored, and the w=(value) and l=(value) terms give the
proper width and length of the transistor, which in turn can be
used to compute squares, and in conjunction with the polysilicon
resistivity for the technology, the resistance. If the pseudo_rpoly
layer runs as close to contacts as possible, then the computed
resistance will be reasonably accurate. In the above example from
my DAC, the SPICE line defines a 0.95-square resistor between nodes
"rtap" and "rout". Node "a_536_60" (the pseudo_rpoly "gate") is
ignored, and the "substrate" connection Gnd is meaningless.
I hope this explanation helps!
Regards,
Tim
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