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From: Robert Penny (rob AT network DOT ucsd.edu)
Date: Fri Sep 06 2002 - 17:43:00 EDT

  • Next message: Robert Penny: "Re: Accurate resistance extraction" 

    I'm chasing down a design problem in an ASIC laid out in Magic.  I think
the problem is coming from resistive drops in various power distribution
nets within the chip.

I am trying to hack the Magic code to follow a selected net, mesh the
tiles in that net into smaller finite element modeling tiles (so that the
edges all of the FEM tiles contact paint or space uniformly along every
edge), build a resistance network that describes the selected paint and
simplify it.  Of course I only have a few days to get this working, so (a)
it's a long shot, and (b) I'd hate to duplicate existing work.

I know there is a basic resistance extractor for Magic, and an extractor
that can refine the lumped node resistance into some subnode resistances.
(The name of the command escapes me at the moment.) The documentation I've
seen has only spoken of this being of use for refining timing simulations.

Does anyone know how accurate netlists from the refined extractor would be
for analog simulation?  Also, are there any notes available on the
organization of the Magic source tree, execution flow or utilizing the
database calls from your own code.

Thanks,

-Rob Penny.

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