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From: Atif (atif AT kics DOT edu.pk)
Date: Wed May 28 2003 - 07:58:56 EDT

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    I am having problems in using Netgen for LVS to compare the two netlists from Magic7.1 (nor.sim) and Xcircuit3.1 (nor.sim). 
    On the NetGen1.1 commad:  
    which command to write in order to lvs the two netlists?
    
    I've successfully simulate the two netlists indivisually using IRSIM9.6. The outputs are OK for both. But when I use Netcomp to compare the both, the two netlists mismatch. Here are some of the outputs.
    ======================================================================
    [root AT atif Netgen]# netcomp  DOT /magicfiles/nor.sim ./xcircuitfiles/nor.sim
    Strange token in .sim: 'R'
    line number 8 = 'R a_9_n5 238'
    Strange token in .sim: 'R'
    line number 10 = 'R a 1038'
    Strange token in .sim: 'R'
    line number 12 = 'R z 460'
    Strange token in .sim: 'R'
    line number 14 = 'R b 871'
    Strange token in .sim: 'R'
    line number 16 = 'R GND 441'
    Strange token in .sim: 'R'
    line number 18 = 'R Vdd 7055'
    Comparing cells: ./magicfiles/nor.sim (circuit 1) and ./xcircuitfiles/nor.sim (c
    ircuit2).
    
    Contents of circuit 1:  Cell: './magicfiles/nor.sim'
    Cell ./magicfiles/nor.sim contains 11 instances.
      Class: c                    instances:   7
      Class: n                    instances:   2
      Class: p                    instances:   2
    Cell contains 13 nodes.
    Contents of circuit 2:  Cell: './xcircuitfiles/nor.sim'
    Cell ./xcircuitfiles/nor.sim contains 4 instances.
      Class: n                    instances:   2
      Class: p                    instances:   2
    Cell contains 6 nodes.
    
    Circuit 1 contains 11 elements, Circuit 2 contains 4 elements. *** MISMATCH ***
    Circuit 1 contains 13 nodes,    Circuit 2 contains 6 nodes. *** MISMATCH ***
    
    Element Mismatch: Circuit 1 has 11, Circuit 2 has 4.
    Node Mismatch: Circuit 1 has 13, Circuit 2 has 6.
    Iteration:   0: Element classes =    3 (+3);     Node classes =    1 (+1)
    Iteration:   1: Element classes =    3 (+0);     Node classes =    4 (+3)
    Iteration:   2: Element classes =    5 (+2);     Node classes =    4 (+0)
    Iteration:   3: Element classes =    5 (+0);     Node classes =    4 (+0)
    Iteration:   4: Element classes =    5 (+0);     Node classes =    4 (+0)
    Circuits do not match.
    
    ILLEGAL element partition: class fragments follow (with node fanout counts):
      (1): c1           ==>  (c_top, c_bot) = (); c_bot = 4; c_dummy = 1
      (1): c2           ==>  (c_top, c_bot) = (); c_bot = 4; c_dummy = 1
      (1): c3           ==>  (c_top, c_bot) = (); c_bot = 8; c_dummy = 1
      (1): c5           ==>  (c_top, c_bot) = (); c_bot = 8; c_dummy = 1
      (1): c4           ==>  (c_top, c_bot) = (); c_bot = 8; c_dummy = 1
      (1): c6           ==>  (c_top, c_bot) = (); c_bot = 8; c_dummy = 1
      (1): c7           ==>  (c_top, c_bot) = (); c_bot = 8; c_dummy = 1
    ---------------------------
    
    ILLEGAL node partition: class fragments follow (with fanouts):
      (1): z                 ==>   n:drain = 2; p:drain = 1; c:c_top = 1
      (1): Vdd               ==>   p:drain = 1; c:c_top = 3
      (1): GND               ==>   n:drain = 2; c:c_top = 6
      (2): GND               ==>   n:drain = 2
      (1): cdum1             ==>   c:c_dummy = 1
      (1): cdum2             ==>   c:c_dummy = 1
      (1): cdum3             ==>   c:c_dummy = 1
      (1): cdum4             ==>   c:c_dummy = 1
      (1): cdum5             ==>   c:c_dummy = 1
      (1): cdum6             ==>   c:c_dummy = 1
      (1): cdum7             ==>   c:c_dummy = 1
      (2): Vdd               ==>   p:drain = 1
      (2): out               ==>   p:drain = 1; n:drain = 2
    ---------------------------
      (2): ext9              ==>   p:drain = 2
      (1): a_9_n5            ==>   p:drain = 2
    ---------------------------
    Cells are different.
    ====================================================================
    
    Here are the two .sim files:
    
    ===========================================================
    //Magic nor.sim file
    | units: 100 tech: scmos format: SU
    n b z GND 2 4 -1 26 g=S_Gnd s=A_48,P_56 d=A_48,P_56
    n a z GND 2 4 19 26 g=S_Gnd s=A_0,P_0 d=A_0,P_0
    p b a_9_n5 z 2 8 9 -3 g=S_Vdd s=A_16,P_20 d=A_48,P_28
    p a Vdd a_9_n5 2 8 9 -7 g=S_Vdd s=A_48,P_28 d=A_0,P_0
    C Vdd b 8.6
    C Vdd a 11.0
    R a_9_n5 238
    C a GND 7.9
    R a 1038
    C z GND 11.7
    R z 460
    C b GND 6.9
    R b 871
    C GND GND 9.8
    R GND 441
    C Vdd GND 9.8
    R Vdd 7055
    =========================================================
    
    ==========================================================
    //Xcircuit nor.sim file
    | sim circuit "11" from XCircuit v3.10
    p a Vdd ext9
    p b ext9 out
    n b GND out
    n a GND out
    ==========================================================
    
    Can you please tell me why is the mismatch? How to get rid of it?
    
    Regards
    Atif
    
    
    
    

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