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From: Atif (atif AT kics DOT edu.pk) Date: Thu May 29 2003 - 07:03:16 EDT
Dear tim, is that "exttosim cthresh infinite" and "exttosim rthresh infinite" or "ext2sim cthresh infinite" and "ext2sim rthresh infinite"? I have tried it but it is unable to find any infinite file. Please see the outputs below. The netlists still mismatch. ========================================================== [root AT atif magicfiles]# /home/cad/bin/magic nor DOT mag Magic 7.1 - Compiled on Tue Jan 7 16:41:30 PKT 2003. CAD_HOME sets "~cad" to "/home/cad/". Using technology "scmos", version 8.2.8. MOSIS Scalable CMOS Technology for Standard Rules Using TrueColor, VisualID 0x23 depth 24 Loading modules: [help] [box] [drc] [label] [draw] [stack] [prs] [gate] [sel] Use scm-help ? for help on some scheme functions :ext all Unknown command: 'ext' 'all' at (417, -139) Did you point to the correct window? :ext all Extracting nor into nor.ext: :q [root@atif magicfiles]# ls nor nor.ext nor.mag [root@atif magicfiles]# /home/cad/bin/ext2sim cthresh infinite Warning: multiple input files specified; ignoring cthresh CAD_HOME sets "~cad" to "/home/cad/". infinite: No such file or directory ===================================================================== Q.1.It is unable to find any infinite file or directory.Why? ===================================================================== Memory used: 24k [root@atif magicfiles]# ls infinite.al infinite.nodes infinite.sim nor nor.ext nor.mag [root@atif magicfiles]# /home/cad/bin/ext2sim rthresh infinite Warning: multiple input files specified; ignoring rthresh CAD_HOME sets "~cad" to "/home/cad/". infinite: No such file or directory Memory used: 24k [root@atif magicfiles]# ls infinite.al infinite.nodes infinite.sim nor nor.ext nor.mag [root AT atif magicfiles]# jed infinite DOT sim [root AT atif magicfiles]# /home/cad/bin/ext2sim -t! -t# nor DOT ext CAD_HOME sets "~cad" to "/home/cad/". Memory used: 28k [root@atif magicfiles]# ls infinite.al infinite.sim nor.al nor.mag nor.sim infinite.nodes nor nor.ext nor.nodes [root AT atif magicfiles]# cd DOT . [root@atif Netgen]# ls magicfiles netgen-1.2.3 netgen-1.2.3.tgz NETGENprob xcircuitfiles [root AT atif Netgen]# netcomp magicfiles/nor DOT sim xcircuitfiles/nor.sim Strange token in .sim: 'R' line number 8 = 'R a_9_n5 238' Strange token in .sim: 'R' line number 10 = 'R a 1038' Strange token in .sim: 'R' line number 12 = 'R z 460' Strange token in .sim: 'R' line number 14 = 'R b 871' Strange token in .sim: 'R' line number 16 = 'R GND 441' Strange token in .sim: 'R' line number 18 = 'R Vdd 7055' Comparing cells: magicfiles/nor.sim (circuit 1) and xcircuitfiles/nor.sim (circu it2). Contents of circuit 1: Cell: 'magicfiles/nor.sim' Cell magicfiles/nor.sim contains 11 instances. Class: c instances: 7 Class: n instances: 2 Class: p instances: 2 Cell contains 13 nodes. Contents of circuit 2: Cell: 'xcircuitfiles/nor.sim' Cell xcircuitfiles/nor.sim contains 4 instances. Class: n instances: 2 Class: p instances: 2 Cell contains 6 nodes. Circuit 1 contains 11 elements, Circuit 2 contains 4 elements. *** MISMATCH *** Circuit 1 contains 13 nodes, Circuit 2 contains 6 nodes. *** MISMATCH *** Element Mismatch: Circuit 1 has 11, Circuit 2 has 4. Node Mismatch: Circuit 1 has 13, Circuit 2 has 6. Iteration: 0: Element classes = 3 (+3); Node classes = 1 (+1) Iteration: 1: Element classes = 3 (+0); Node classes = 4 (+3) Iteration: 2: Element classes = 5 (+2); Node classes = 4 (+0) Iteration: 3: Element classes = 5 (+0); Node classes = 4 (+0) Iteration: 4: Element classes = 5 (+0); Node classes = 4 (+0) Circuits do not match. ILLEGAL element partition: class fragments follow (with node fanout counts): (1): c1 ==> (c_top, c_bot) = (); c_bot = 4; c_dummy = 1 (1): c2 ==> (c_top, c_bot) = (); c_bot = 4; c_dummy = 1 (1): c3 ==> (c_top, c_bot) = (); c_bot = 8; c_dummy = 1 (1): c5 ==> (c_top, c_bot) = (); c_bot = 8; c_dummy = 1 (1): c4 ==> (c_top, c_bot) = (); c_bot = 8; c_dummy = 1 (1): c6 ==> (c_top, c_bot) = (); c_bot = 8; c_dummy = 1 (1): c7 ==> (c_top, c_bot) = (); c_bot = 8; c_dummy = 1 --------------------------- ILLEGAL node partition: class fragments follow (with fanouts): (1): z ==> n:drain = 2; p:drain = 1; c:c_top = 1 (1): Vdd ==> p:drain = 1; c:c_top = 3 (1): GND ==> n:drain = 2; c:c_top = 6 (2): GND ==> n:drain = 2 (1): cdum1 ==> c:c_dummy = 1 (1): cdum2 ==> c:c_dummy = 1 (1): cdum3 ==> c:c_dummy = 1 (1): cdum4 ==> c:c_dummy = 1 (1): cdum5 ==> c:c_dummy = 1 (1): cdum6 ==> c:c_dummy = 1 (1): cdum7 ==> c:c_dummy = 1 (2): Vdd ==> p:drain = 1 (2): out ==> p:drain = 1; n:drain = 2 --------------------------- (2): ext9 ==> p:drain = 2 (1): a_9_n5 ==> p:drain = 2 --------------------------- Cells are different. [root@atif Netgen]# ============================================================ Please guide me how to get rid of that? Regards Atif ----- Original Message ----- From: "R. Timothy Edwards" <tim AT stravinsky DOT jhuapl.edu> To: <atif AT kics DOT edu.pk> Sent: Wednesday, May 28, 2003 6:41 PM Subject: RE: netgen > Dear Atif, > > You're doing the right thing with netgen. The only thing you > want to make sure of, in this case, is that magic doesn't write out > lumped capacitance and resistance records (parasitics). Netgen > ignores the lumped-resistance 'R' records (because they are 1-node > devices, so they can't be interpreted as anything physical), but > it's reading the parasitic caps and failing to match them to anything > in the schematic-capture sim file. > > Use "exttosim cthresh infinite" and "exttosim rthresh infinite" > to prevent magic from writing parasitics, before doing "exttosim". > > Regards, > Tim >
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