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Magic Mailing List |
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From: Steven M Brown (smbrown AT cse DOT psu.edu) Date: Wed Oct 22 2003 - 16:04:51 EDT
I have investigated your suggestion and deemed it an ugly kludge. It is only to be surpassed by the horrible, ugly kludge that I would have to put in place to clean it up. Magic knows the per-lambda resistances (it puts the resistance class at the top of the .ext file) and it was able to extract the length and width of the "pseudo-fet" using the pseudo-resistor layers. Why does Magic not know how to put 2 and 2 together (or in this case resistor_class/pseudofet_width*pseudofet_length) and dump the resistor value directly into the .ext file? Idle thoughts on how to accomplish this without breaking the technology file, the ext file format, and everyone's designs... Why not use REX's resistance identification code (the one which says "I should extract THIS NODE") with the length calculation routine used in the pseudo-layer extractor to generate the resistances directly? It might be nice if the "res:force@" label could be used to circumvent the tolerance optimization. Is the pseudo-layer --really-- needed to identify the entire area which needs to be lumped into the pseudo-fet? Is this the reason why a sim file is needed before ;extres works? Steve On Wed, 22 Oct 2003, Jeff Sondeen wrote: > Steven M Brown writes: > > I am still using 7.1 and am having trouble extracting the resistances for > > the attached file. > > hi why don't you use 'pseudo-resistor' layers, to designate your > resistors and have them extracted as 'resistor devices' during normal > ';extract' (that you will have to edit after 'ext2spice', before > running spice), see the example > > ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/examples/SCNA.00.resistors.* > > warning: you'll have to read the README and CHANGELOG files to figure > out how to use that style of techfile > > ftp://ftp.isi.edu/pub/sondeen/magic/new/README > ftp://ftp.isi.edu/pub/sondeen/magic/new/beta/CHANGELOG
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