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Dear Syed,

   I just posted magic versions 7.2.67 and 7.3.15, both of which implement
a slightly modified "exttospice" (ext2spice) which automatically generates
a ".subckt ... .ends" record around the netlist of any top-level cell
being netlisted that contains ports.  You are likely to be the first
person to make use of the function, so please let me know right away if
you encounter problems.

   Note that if you have a digital circuit "top" containing standard cells
like "and2", etc., with ports, you would want to do "extract all" from the
top level, then "exttospice" on this top level (or "ext2spice top" from
the UNIX command line in the non-TCL version of magic).  That will
generate the top-level SPICE file, making calls (e.g., "X1 a b c and2")
to the subcircuits.  To get the SPICE subcircuit for "and2", though,
you would need to do "load and2" followed by "exttospice" (or "ext2spice
and2" in the non-TCL version).  This produces file "and2.spice", which
must be appended to "top.spice" before simulating.

					Regards,
					Tim

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