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From: Conrad H Ziesler (cziesler AT eecs DOT umich.edu) Date: Thu Apr 25 2002 - 03:42:04 EDT
A quick look at the recent techfiles from mosis indicates that all of the via and contact planes are redundantly included (for whatever reason) The point is if all the cut planes are being defined anyways, is there any legitimate space, time, or code complexity reason to keep the somewhat broken contact implementation? The motivation is that planar processes allow stacked vias. Routers (especially cadence's warp route) seem to work better with fewer constraints on via/contact placement. Magic is currently unable to handle off-centered or differing sized stacked contacts due to conflicts in the image tile(s). (ie. the image plane must be a tile of the same dimensions/location as the drawn contact). Other than 1. automatically building nice draw/erase rules 2. specifying electrical continuity is there any place in the magic code that prevents ripping out the image plane stuff? i'm worried about stuff maybe in the extractor,calma/cif, or drc that relies on the image planes being drawn? I already tried rewriting the techfiles by moving the home plane of all contacts to via planes, (reordering the planes section to be physically realistic) and making them all 3-layer contacts (ie. the image planes fall into the below and above metal layers) This ridiculously simplifies the techfiles (no more pm12c,ndm12c,pd12c,m123c,m234c,m345c,etc). However the image plane stuff still causes trouble because painting say m1 over a corner of a ndc will split the ndc/m1 image tile and ruin the contact (at least for DRC purposes), it still gets drawn correctly. --------- also, i have a simple place/route toolflow that works with magic that i'll be putting out soon if anyone is interested. Basically just a set of translators for specially labeled magic cells --> .LEF (cadence library exchange format) specially labeled magic cells + automatic hspice characterization --> .lib (synopsys synthesis library format) and cell instantiations and wire <--> .DEF (cadence design exchage format) also, UCLA put out a free set of tools including a recursive-bisection cell placer "Capo" that will read a subset of LEF/DEF. I'm not aware of any free source workable over-the-cells router though, i've just been using the cadence warp-route. --conrad (cziesler AT eecs.umich.edu)
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