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From: Mika Nystrom (mika AT async DOT caltech.edu) Date: Wed Nov 13 2002 - 13:39:26 EST
If all it's for is some class projects, you can probably get away with using squares of "pad" in the right places and wire to them. If you do that, just don't drag your feet on the carpet before you go to test the chips. Add some diodes and resistors and things if you feel ambitious... Mika Richard Lethin writes: >I noticed that MOSIS is offering AMI 0.5um (SCN3ME_SUBM.30, e.g., >lambda=0.30um) this year for educational class projects. > >However, the pad frame in MAGIC format in Sondeen's example directory >(SN3M_SUBM.30.PADS.5000) seems to have huge pad layouts, so the >(2551um)^2 example both exceeds the (1.5mm)^2 limit for educational >projects at MOSIS, and is only 28 pins! (vs. the 40 pins in the >SCNA.80.PADS.2000 frame). > >MOSIS does make available Tanner's frame for 0.3um, but in GDS/CIF >format. And Tanner's frame looks pretty sweet - both meeting the >(1.5mm)^2 guidelines and providing 40 pins (how MOSIS is going to bond >the tinychip to such a thing impresses me). > >The problem of course is that we'd like to use the MAGIC tools and drop >in the Tanner frame. That doesn't look so easy. Reading the CIF into >MAGIC using the SCN3M_SUBM.30 tech file, there are zillions of error >messages about alignment, labels moving around, and the result has lots >of DRC errors. > >Can anyone suggest a course for making this easy? I suppose there >aren't that many components to the Tanner frame and we could go and fix >the DRC errors. But is there better magic, pun intended? > >Thanks, > >Rich > > >
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