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Magic Mailing List |
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From: cfk (cfk AT pacbell DOT net) Date: Sat Apr 19 2003 - 16:52:33 EDT
Dear Alhishek:
Well, I usually extract, then go either exttosim or exttospice and look
for GDSB connections of my transistors that dont make sense. In a small
layout that is easy but gets to be a larger effort the larger the circuit
is. I believe that Tim is recently advocating the use of netgen, which is a
utility for LVS that he is working on to compare a schematic to an extracted
magic netlist. You might download that and look at its usuage. I believe
that it will become the LVS tool with magic soon.
On your segfault question, by all means please post the details so we
may understand them and help you out as much as possible.
Charles
----- Original Message -----
From: "Abhishek Singh" <asingh AT iitk DOT ac.in>
Cc: <magic-dev AT csl DOT cornell.edu>
Sent: Saturday, April 19, 2003 1:24 PM
Subject: electrical connectivity between nodes
>
> Hi!
>
> Please repost this to the correct list if this is not the one. It has
> nothing to do with magic development.
>
> How can I check whether two labels (or two selections or whatever) in the
> same cell are electrically connected?
>
> I do it by naming them the same global node and then checking for warning
> during extraction. I hope there will be a faster way.
>
> Also, while using iroute to route within a cell I managed to get a
> segmentation fault! Should I post the details to the developers' list?
>
> Thanks.
>
> --
> Abhishek Singh,
> Senior Undergraduate,
> Department of Electrical Engineering,
> Indian Institute of Technology,
> Kanpur - 208016,
> India.
>
> http://home.iitk.ac.in/student/asingh
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