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From: cfk (cfk AT pacbell DOT net)
Date: Fri May 02 2003 - 12:33:18 EDT

  • Next message: Martin, Mark: "RE: EDIF" 

    I wonder if we can discuss EDIF or perhaps the more general topic of getting
a portion of a digital design expressed in Verilog or VHDL into Magic for a
while. Is there a way to get a netlist of a digital design into Magic
somehow. I can see the notion of creating a netlist by hand, but I that will
soon become too cumbersome.

If not, what is the most appropriate way to add the capability to read an
EDIF or EDIF like netlist into Magic for the purpose of then placing and
routing by hand INV, OR, AND cells and using its route command to route
those cells.

I know this pandoras box has many components, I am just trying to pick a
place to start that has a reasonable probability of getting as far as
possible with the least amount of work on the part of all concerned.

Charles

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