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From: Martin, Mark (Mark.Martin AT jhuapl DOT edu) Date: Fri Feb 21 2003 - 14:30:03 EST
Where to begin? 1. Performance. Pick a metric, power, speed, chip area - a good custom design can beat an FPGA 2. Cost (if large quantities are needed a custom chip beats an FPGA) 3. last time I checked the real world is analog and any mixed signal operation can't be done on an FPGA 4. Any form of HDL isn't VLSI design! 5. REAL VLSI is done at the transistor level. 6. ASIC doesn't equal VLSI These are the answers I give my students when they ask this is or similar questions. Mark -----Original Message----- From: Atif Nadeem [mailto:anadeemk AT yahoo DOT com] Sent: Friday, February 21, 2003 11:18 AM To: magic-dev AT csl DOT cornell.edu Subject: why layout instead of simple FPGA? Hi, So far as what I can understans is there are two ways for vlsi design. Is'nt it? i) you got verilog code and give it to logic synthesis tools (like Xilinx) which give you the gatelevel netlist of your verilog code and then you connect your FPGA board to usb port and the xilinx will load that gatelevel netlist to FPGA and you can test it and can use it for different applications just as like a chip. ii) Now the second way is to got verilog code and give it to logic synthesis tools which give you the gatelevel netlist of your verilog code then use the lay out design of netlist (using magic) and then fabricate your layout design into a chip and use it for applications. I can't understand if the first technique i.e FPGA is very simple and easy to adopt, then why to bother the complex 2nd technique i.e of layout design and fab? I mean what power lies in using layout flow which you cannot get from FPGA flow? (may be I'm wrong somewhere in describing the above two flows but its my understanding, please correct me if so). Regards Atif _____ Do you Yahoo!? Yahoo! <http://rd.yahoo.com/finance/mailtagline/*http://taxes.yahoo.com/> Tax Center - forms, calculators, tips, and more
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